1. Field of the Invention
This invention relates generally to bus-oriented backplanes used for interconnecting electronic circuit boards that plug into the backplane, and relates more particularly to a digital bus backplane having interface circuitry located on the backplane.
2. Description of the Relevant Art
A backplane is an electro-mechanical structure that is used both as a mechanical structure for supporting several electronic daughter circuit boards that plug into the backplane and as a communication medium for electrically interconnecting the daughter circuit boards. A typical prior art backplane 10, as illustrated in FIG. 1, includes a backplane circuit board 12 and several backplane connectors 14 that extend across the width of the backplane circuit board. Each of the backplane connectors 14 receives and supports a daughter circuit board 16, which contains various circuitry that is usually digital in nature such as, for example, a computer processor or memory. The backplane 10 can support and interconnect any number of daughter circuit boards 16 up to the number of backplane connectors 14. The daughter circuit boards 16 interconnected by the backplane 10 comprise an electronic system, which, for example, might be a microcomputer.
In addition to supporting several daughter circuit boards 16, the backplane 10 also electrically interconnects the daughter circuit boards. The interconnections are usually implemented in the form of parallel bus lines 18 (FIGS. 2 and 3) that extend at right angles to the backplane connectors 14 from one end of the backplane circuit board 12 to the other. Each contact 20 of each backplane connector 14 is electrically connected to a bus line 18, with all similarly located contacts of each backplane connector being connected to the same bus line. When a daughter circuit board 16 is installed into the backplane 10 by plugging a daughter board connector 19 of the daughter circuit board into the backplane connector 14, each contact 20 of the backplane connector engages and establishes an electrical connection with a corresponding signal pin 22 of the daughter circuit board. Because similarly located contacts 20 of each backplane connector 14 are connected to the same bus line, the interconnections among the daughter circuit boards 16 are the same regardless of which backplane connector 14 the daughter circuit boards are plugged into.
Commonly, the backplane circuit board 12 is a two sided circuit board with the bus lines 18 located on one side of an insulative substrate 24 such as fiberglass, and a ground plane 26 located on the other side of the substrate. Such a backplane circuit board 12 is a microstrip type backplane, with the bus lines 18 shielded on one side by a ground plane. The ground plane 26 extends substantially across the length and width of the backplane circuit board 12. The daughter circuit board 16 is grounded to the ground plane 26 through a ground contact 28 of the backplane connector 14 that is electrically connected to the ground plane, and through a ground pin 30 of the daughter circuit board that engages the ground contact 28. In addition to providing a ground to the daughter circuit boards 16, the ground plane 26 also shields the bus lines 18 from the circuitry of the daughter circuit boards.
Most backplanes are constructed according to one of many backplane bus standards, such as Multibus or S-100. Each bus standard specifies which pins of the backplane connectors 14 provide power, ground, and signals to the daughter circuit boards. From the viewpoint of the daughter circuit board 16, the bus standard defines the size and shape of the daughter board connector 19 and the function of each signal pin 22. Most of the bus lines 18 are signal lines that carry data, address, and control signals among the various daughter circuit boards 16.
In prior art backplane systems, each daughter circuit board 16 includes several transceivers 32, each of which provides a bidirectional signal interface between the circuitry of the daughter circuit board and one of the bus lines 18. Since the transceiver 32 is located on the daughter circuit board 16, the transceiver is connected to its corresponding bus line 18 through the signal pins 22 of the daughter board connector 19 and the contact 20 of the backplane connector 14. Each transceiver 32 is operable for both sending digital information to and receiving digital information from its corresponding bus line 18. Typically, precharged bus lines 18 are utilized, so that to transfer digital information between daughter circuit boards 16 via the bus, the driver portion of a transceiver 32 selectively grounds the bus line to pull the voltage of the bus line to the logic low voltage and disconnects the bus line from ground to allow the bus line to return to the logic high voltage.
A schematic diagram of a typical open collector driver 34 is shown in FIG. 4. The collector of the driver 34 is connected to a bus line 18 through the signal pin 22 and the contact 20, while the emitter of the driver is connected to the local ground of the daughter circuit board 16, which is in turn connected to the ground plane 26 of the backplane 10 through the ground pin 30 and the ground contact 28. A control signal generated on the daughter circuit board 16 and supplied to the base of the driver 34 controls the operation of the driver. The inductances of the two connections between the driver 34 and the backplane 10 are represented by inductors 36 and 38.
Speed is perhaps the most important feature of any bus standard because the speed of the bus determines how quickly the daughter circuit boards 16 can communicate with each other, and, thus, determines the operational speed of the system. The maximum data transfer rate between two daughter circuit boards 16 is determined by the response times of the two daughter circuit boards plus the bus delay. The response time of the transmitting daughter circuit board is determined by the time required to discharge the bus line to ground through its driver, while the response time of the receiving daughter circuit board is determined by the time required for its receiver to respond to voltage changes that exceed the threshold voltage. The bus delay refers to the propagation delay of a signal travelling in a bus line between two connectors, with the worst case bus delay occurring between the two connectors located at the outer extremes of the backplane.
Signal speed is limited in prior art backplanes because of high inductance between each driver and its corresponding bus line. As seen in FIG. 4, all of the current that the driver 34 discharges from the bus line 18 to the ground plane 26 must pass through connectors 14 and 19, which contain a certain amount of inductance as represented by inductors 36 and 38. The energy stored in the inductors 36 and 38 limits the rise time of a signal pulse. If the rise time is too short, substantial ringing will occur, which may cause the signal pulse to pass through the threshold voltage and cause the receiver to sense false transitions. Thus, the inductance of the connectors slows the response time of the transmitting daughter circuit board.
Signal speed is also limited due to high capacitive loading on the bus line. The capacitance of each of the daughter circuit boards 16 significantly lowers the impedance of the backplane 10 when they are installed in the backplane. The capacitance added by each daughter circuit board 16 is due mainly to the driver, but also includes contributions by the receiver, the connector 19, and the circuit traces on the daughter circuit board. The addition of daughter circuit boards may, for example, reduce the impedance of the backplane from 100 ohms, when unloaded, to 20 ohms, when loaded. This lowered impedance significantly increases the propagation delay of the bus.
Signal noise is another limiting factor in the performance of a backplane. One source of signal noise has been discussed above, namely that caused by the inductance between the driver and bus and the resultant signal ringing. Another source of signal noise is due to uneven loading of the backplane. Since the effective impedance of the loaded backplane is significantly different from the effective impedance of the unloaded backplane, variations in impedance will occur whenever the backplane is not fully populated with daughter circuit boards. These impedance variations cause signal reflections that contribute to the noise problem.
Backplane performance is also impacted by the heat generated by the transceiver circuits. Due to the low impedance of the loaded backplane, the drivers must be large enough to handle substantial current loads. Unfortunately, high current devices generate a substantial amount of heat. This thermal energy is difficult to remove due to the close spacing of the backplane connectors 14, which restricts the effectiveness of heat sinks. Typically, cooling fans are used to blow air between the daughter circuit boards 16 to cool the transceivers, even when the remainder of the circuitry on the daughter circuit boards includes low power devices such as CMOS devices that would not otherwise require active cooling. Thermal considerations also limit the number of transceiver circuits that can be packaged in each chip, which means that several chips and a corresponding amount of board space is required for providing the interface circuitry on each daughter circuit board.